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Chapter V central processing unit
2022-07-21 17:37:00 【codefan※】
a central processor
CPU The function and basic structure of
CPU The function of
- The central processing unit is composed of arithmetic unit and controller .
- Arithmetic unit : Process the data
- controller : Be responsible for coordinating and controlling the instruction sequence of computer components to execute programs ( Take command 、 Analysis instructions 、 Execution instruction )
- function : Command control 、 Operational control 、 time control 、 The data processing 、 Interrupt handling
CPU Basic structure
- Arithmetic unit
form | function |
---|---|
Arithmetic logic unit ALU | Do arithmetic / Logical operations |
Temporary register | Temporarily store data read from main memory , Transparent to application meta |
Accumulation register ACC | The staging ALU Operation result information , It can be used as an input of addition operation |
General register group | Used to store operands |
Program status word register PSW | All kinds of state information established by the result of arithmetic logic operation instruction or test instruction are retained |
Shifter | Shift the operand or operation result |
Counter CT | Controls the number of steps in multiplication and division |
- controller
form | function |
---|---|
Program counter PC | Used to indicate the location of the next instruction in main memory |
Instruction register IR | It is used to save the currently executing instruction |
Instruction decoder | |
Memory address register MAR | The address used to store the main memory unit to be accessed |
Memory data register MDR | Used to store information written to or read from main memory |
Sequential systems | Used to generate all kinds of timing signals , They all consist of a unified clock CLOCK Divide the frequency to get |
Micromanipulation signal generator |
Instruction execution process
Instruction cycle
Concept | explain |
---|---|
Instruction cycle | CPU The time taken to fetch and execute an instruction from main memory , It is often expressed by several machine cycles |
Machine cycle | Contains several clock cycles |
Clock cycle | CPU The most basic unit of operation |
A complete instruction cycle should include values 、 Inter site 、 Execution and interruption 4 A cycle .
- The addressing period is Take command
- The inter address period is Take a valid address
- The execution cycle is Fetching operands
- The interruption period is Save program breakpoints
Instruction cycle data flow
Take the period : according to PC Take the instruction code from the main memory and store it in IR in
- PC → MAR → Address bus → Main memory
- CU → Control bus → Main memory
- Main memory → data bus → MDR → IR
- CU → PC
Interval period : Fetch the valid address of the operand
- IR → MAR → Address bus → Main memory
- CU → Control bus → Main memory
- Main memory → data bus → MDR
Execution cycle : Fetching operands , And according to IR The opcode of the instruction word in passes ALU Operations produce execution results
Interrupt cycle : Save breakpoints , Send interrupt vector , Processing interrupt requests
Instruction execution scheme
Single instruction cycle
- Choose the same execution time for all instructions
- Between instructions Serial execution
- The instruction cycle depends on the execution time of the instruction with the longest execution time
- It will reduce the running speed of the whole system
Multiple instruction cycles
- Choose different execution steps for different types of instructions
- Between instructions Serial execution
- Need more complex hardware design
Pipeline solution
- Instructions can Parallel execution The plan
Function and basic structure of data path
The function of data path
The path through which data is transferred between features is called Data access
The function of data path is Realization CPU Internal arithmetic unit and register and data exchange between registers
The basic structure of data path
The basic structure | Advantages and disadvantages |
---|---|
CPU Internal single bus mode | Simple structure , Easy to implement , There are many conflicts in data transmission , Low performance |
CPU Internal three bus mode | Different data can be transmitted on multiple buses at the same time |
Dedicated data path mode | There is basically no data conflict , Higher performance , But the amount of hardware is large , It's not easy to achieve |
- An internal bus is the same component
- System bus refers to the components of the same computer system
- Data transfer between registers
// With PC For example
PC → Bus Pcount It works ,PC Content delivery bus
Bus → MAR MARin It works , The bus content is sent to MAR
- Main memory and CPU Data transfer between
// With CPU Take reading instructions from main memory as an example
PC → Bus → MAR PCout and MARin It works
1 → R CU Issue a read command
MEM(MAR) → MDR MDRin It works
MDR → Bus → IR MDRout and IRin It works
- To perform arithmetic or logical operations
// Take addition as an example
Ad(IR) → Bus → MAR MDRout and MARin It works
1 → R CU Issue a read command
MEM → cable → MDR
MDR → Bus → Y
(ACC) → (Y) → Z
Z → ACC
notes : Understand together with the above figure
Function and working principle of the controller
Structure and function of the controller
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