UART bus protocol

• Fang XS.
• [email protected]
• Record learning , Easy to review .
• If there is an error , Hope to be pointed out , The road of learning technology will inevitably be bumpy .

brief introduction

• UART It's a double line , full duplex , Serial bus protocol .
• UART General asynchronous transceiver （Universal Asynchronous Receiver/Transmitter).
• For short distances , Point to point communication .
• Hardware ：
  1. RXD For receiving signals .
  2. TXD Used to send signals .
  3. When two devices use serial port communication ,A The equipment RXD Connect to B The equipment TXD,B The equipment RXD Connect to A The equipment TXD, Cross connect .
• Baud rate ：
  • Baud rate is a measure UART Important standard of communication speed , Company (bit/s).
• because UART There is no clock synchronization line , So the two devices use their own clock lines .
  1. Only with a unified baud rate can communication be correct .
  2. If you send a lot of data in succession , Suppose the second data starts to be wrong , The following data will be wrong , So in order to prevent cumulative error ,UART Data is sent frame by frame .
• MCU Peripherals usually come with UART Hardware peripherals , Therefore, the actual use only needs to configure registers , Write send and receive functions .
• Communication between two devices , Baud rate must be configured the same , In practice , Garbled code is basically inconsistent with baud rate .

The frame format

• UART A communication frame has a start bit , Data bits , Parity bit , Stop bit .
• UART The idle bit is high .
• Start bit ：
  • Used to start the bus .
  • To send data, pull the signal down by one clock cycle .
• Data bits ：
  • The data bits are configurable 5-8 position .
  • Data bits send data from low to high .
• Parity bit ：
  • Odd check ： In data bits 1 For the even , Check bit is 1( Keep it odd ).
  • Even check ： In data bits 1 For the even , Check bit is 0( Keep it even ).
  • No verification ： There can be no check digit .
• Stop bit ：
  • To end sending data, pull up the signal by one clock cycle , Indicates the end of data communication in this frame .
• Frame format diagram ：