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S3c2440 u-boot migration - norflash driver support - s29al016u-boot version: 2008.10 development board: mini2440
2022-07-20 19:21:00 【Micro embedded electron】
U-Boot edition :1.1.6 Development board :Mini2440
It has been transplanted for a long time according to the Experimental Manual of national inlay, but it has not been successful , The key is the Norflash Model is SST1601, And my Mini2440 The development board is configured with Spansion The company's S29AL016J chip , The two models are different , The changes are quite different . Later, I found that S29AL016J Chip and smdk2410 The chip used by default (AMD Of AM29LV400) Except for different sizes , Others such as command sequence , The operation mode is the same ( No wonder I'm finishing the national inlay experiment manual 2.4 You can save environment variables later ). So according to AM29LV400 There are not many changes to transplant .
Inquire about datasheet after , Get the following information ;
The Norflash chip , Divide into 35 Sectors ,(Bottom Boot Device) front 4 The sizes of the sectors are 16KB,8KB,8KB,32KB, after 31 The size of each sector is 64K, All in all 2MByte. chip id by 0x2249, manufacturer id by 0x01.
according to Mini2440 Schematic diagram of Norflah Of A0 The pins are connected to s3c2440 Of LADDR1 On , So it's a word pattern .
In addition, because in include/flash.h Not found in Spansion The manufacturer of id and S29AL016J chip id The definition of , And found the following AMD manufacturer id And chip id The definition of .
#define AMD_MANUFACT 0x00010001
`
`
#define AMD_ID_LV160B 0x22492249
Coincide with S29AL016J The manufacturer of id And chip id identical , Then we can directly according to AM29LV160B To transplant . We define NORFLASH Models for :AM29LV160.
Modify board level configuration :include/configs/mini2440.h
Comment out AM29LV400 and AM29LV800 The definition of , Join in AM29LV160 The definition of :
/*delete by xxx,for 2440***************************************************************/
#if 0
#define CONFIG_AMD_LV4001 /* uncomment this if you have a LV400 flash */
#define CONFIG_AMD_LV8001 /* uncomment this if you have a LV800 flash */
#endif
/*add by zsf,for mini2440*/
#define CONFIG_AMD_LV160 1 //NOR FLASH S29AL016J
#define PHYS_FLASH_SIZE 0x00200000 /* Chip size 2MB */
#define CFG_MAX_FLASH_SECT (35) /* The number of sectors is 35 */
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x1F0000) /* addr of environment 0x00000000+0x1f0000 Reserved backward 64KB,1 Sector space */
//#define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) /* Storage address of environment variables */
modify board/mini2440/flash.c
One :flash_init (void) Function
#if defined(CONFIG_AMD_LV400)
(AMD_MANUFACT &FLASH_VENDMASK) |
(AMD_ID_LV400B &FLASH_TYPEMASK);
#elif defined(CONFIG_AMD_LV1800)
(AMD_MANUFACT &FLASH_VENDMASK) |
(AMD_ID_LV800B &FLASH_TYPEMASK);
after Join in
/*modified by xxxxxi ,for2440***********************************************/
#elif defined(CONFIG_AMD_LV160)
(AMD_MANUFACT &FLASH_VENDMASK) |
(AMD_ID_LV160B &FLASH_TYPEMASK);
Two :flash_print_info (flash_info_t *info) Function
stay switch (info->flash_id & FLASH_VENDMASK) Lieutenant general
printf ("AMD: ");
Changed to:
printf("SPANSION:")
stay
case (AMD_ID_LV400B &FLASH_TYPEMASK):
printf ("1xAmd29LV400BB (4Mbit)\n");
break;
case (AMD_ID_LV800B & FLASH_TYPEMASK):
printf ("1xAmd29LV800BB (8Mbit)\n");
break;
Then add
/*add by zsf,for mini2440*/
case (AMD_ID_LV160B & FLASH_TYPEMASK):
printf ("1x S29AL016J[16Mbit(2MByte) ,Bottom Boot Device] \n");
break;
This completes the migration , Recompile it .
adopt jlink Download to the development board for testing :
MINI2440 # flinfo
Bank # 1: SPANSION: 1x S29AL016J[16Mbit(2MByte) ,Bottom Boot Device]
Size: 2 MB in 35 Sectors
Sector Start Addresses:
00000000 00004000 00006000 00008000 00010000
00020000 00030000 00040000 00050000 00060000
00070000 00080000 00090000 000A0000 000B0000
000C0000 000D0000 000E0000 000F0000 00100000
00110000 00120000 00130000 00140000 00150000
00160000 00170000 00180000 00190000 001A0000
001B0000 001C0000 001D0000 001E0000 001F0000
MINI2440_Dazhi #
A total of 35 Sectors , The first sector size is 0x4000=16KB, the second , The size of the third sector is 0x2000=8KB, The size of the fourth sector is 0x80000=32KB, be left over 31 All sectors are 0x10000=64KB, The same as the actual situation of the chip .
Test write protection :
MINI2440 # protect on 4000 5ffff
Protected 8 sectors
MINI2440_Dazhi # flinfo
Bank # 1: SPANSION:1x S29AL016J (16Mbit)
Size:2 MB in 35 Sectors
Sector Start Addresses:
00000000 00004000 (RO)00006000 (RO) 00008000 (RO) 00010000 (RO)
00020000 (RO) 00030000 (RO) 00040000 (RO) 00050000 (RO) 00060000
00070000 00080000 00090000 000A0000 000B0000
000C0000 000D0000 000E0000 000F0000 00100000
00110000 00120000 00130000 00140000 00150000
00160000 00170000 00180000 00190000 001A0000
001B0000 001C0000 001D0000 001E0000 001F0000
Same as the theory , correct .
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