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Bram for FPGA logic resource evaluation (taking Xilinx as an example)
2022-07-21 19:30:00 【wkonghua】
stay FPGA Logic design time , You need to refer to the required logical resource pair FPGA Select the type , One of them is right BRAM The evaluation of , Here we are xilinx UltraSCALE+ series FPGA For example , Yes BRAM Give a brief introduction .
FPGA in RAM Resources are generally divided into DRAM and BRAM Two kinds of , and Xilinx UltraSCALE+ series FPGA In addition to the above two RAM outside , Some models also include UltraRAM. among DRAM by Distributed RAM, In order to FPGA in LUT(LUT in SLICEM) Resources produce , Details reference UG574:UltraScale ArchitectureConfigurable Logic Block User Guide;UltraRAM For a clock , Two ports ( Reading and writing ), Simultaneous reading and writing , Every Block Storage capacity up to 288Kb, A clock field can contain 16 individual UltraRAM Blocks, And each Block from 4K x 7 、2 memory block form , For detailed references, see UG573:UltraScale ArchitectureMemory Resources User Guide.
This paper mainly focuses on BRAM Give a brief introduction , And give BRAM Methods of resource evaluation .BRAM For detailed references, please refer to UG573:UltraScale ArchitectureMemory Resources User Guide.
BRAM Belong to FPGA Embedded special RAM,RAM Blocks have large storage space , at present xilinx Typical BRAM Yes 18Kbits and 36Kbits.BRAM There must be a clock ,DRAM It can be pure combinational logic without clock , You can also add one level reg Use the clock .BRAM The read-write port can be configured , Depth can be matched , Multiple BRAM block Can be combined and cascaded , Different bit widths and depths can be set within the allowable range as required ( Storage ) Of RAM block .
for example : You need to save a file first RAM in , stay FPGA Read after the system starts RAM Data processing in ,coe The data stored in the file is 10230 individual 32bit Bit wide data , So in IP Nuclear RAM The set bit width of is set to 32bit Width,Depth Can be set to >10230, If set to 10230, be RAM Storage capacity is 32*10230=327360bits≈39.96KB, This is also the true data size of the data . When the configuration is complete IP Configuration item display uses 36K BRAM total 10 individual Blocks, namely 10*36*1024=368640bits=45KB, This is due to a Block The size of the block is 36Kb, according to IP Depth of configuration , what is needed RAM The number of blocks is greater than 9 Less than 10, Therefore, we need 10 individual 36K BRAM block .
Usually in the configuration BRAM when , The setting depth can be larger than that actually used , Leave a certain margin , Generally, it can be set flexibly according to the situation .
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