Arm V7 kernel notes - General timers and related coprocessors

• 《ARM Architecture Reference Manual ARMv7-A and ARMv7-R》
• 《Cortex-A7 MPCore Technical Reference Manual》

1. stay Cortex-A7 in ,GIC The base address of is saved in CBAR In the register ？

CBAR The register is made up of c15 visit obtain .

c15 Is the register of the system control coprocessor , adopt MRC and MCR Command access .

We can get the following command GIC Base address ：MRC p15, 4, r0, c15, c0, 0 ; obtain GIC Base address , The base address is saved in r0 in .

2. About CP15 Coprocessor

About CP15 Coprocessor summary ：

• 0. adopt MCR Write cp15 Register group , adopt MRC read cp15 Register group
• 1. adopt c0 Register can get processor kernel information ;
• 2. adopt c1 Registers can enable or disable MMU、 I/D Cache etc. ;
• 3. adopt c12 Register can set interrupt vector offset ;
• 4. adopt c14 Registers can access general timers ;
• 4. adopt c15 Register can get GIC Base address .

3. Set the base address of the vector table

The base address of the vector table can be through c12 Register to set ：

MCR p15, 0, r0, c12, c0, 0

4.ARM 7 generic Timer - Universal timer

This general timer provides a unified system count for the kernel ,( similar SysTick?), No , This general timer is only used for counting , No interruption , Timing and interrupt are generated by the private timer on the logic core .

At least 56 A wide , from 0 Start counting , And after power on, even if it sleeps, it will not stop running .

The system counter distributes the count value to each processor core , Each processor core must contain a counter to store the current count value .

CNTFRQ register - System counter frequency register

The software can read this register to obtain the clock frequency of the system counter .

CNTFRQ The frequency of must be set during system startup , Because after reset ,CNTFRQ The value of the register is unknown

CNTPCT register - Count value register of physical timer

Each processor core provides one 64 The physical counter of bit is used to save the count value of the system counter .

CNTPCT The register is used to store the count value of the current physical counter .

CNTP_CVAL register - Comparison value register

Physical counter 64 Bit comparison value counter , When the physical counter CNTPCT Value == CNTP_CVAL When comparing values , Will produce an output signal , If enabled, interrupt , An interrupt is triggered

CNTP_TVAL register - Timer value register

Physical counter 32 Bit timer value register , When this bit is set , that :

CNTP_CVAL = CNTPCT + CNTP_TVAL

When the physical counter value , That is, after the system counter value reaches the value of the comparison value register , It will trigger the timing signal output .

CNTP_CTL register - Physical timer control register

The 32 Bit register is used to control physical timer .

The first 0 position , Indicates whether the physical timer is enabled ,1 To enable ;

The first 1 position , Indicates whether the timing signal of the physical timer is enabled ,1 To enable .

By accessing physical counters , Then you can take the physical counter as the operating system Tick interrupt , And the setting of the system time base can be obtained by matching the system counter frequency counter and the comparison value register