Chisel Combinational circuit （ One ）——Chisel Combinational circuit and Chisel Conditional statements

The last part explained Chisel Syntax and use of modules in , This part will be right Chisel The combinational circuit of . Combinational logic circuit is the basic building block of digital circuit , It is an indispensable element in building a complex digital system . Theoretically, all combinational circuits can be written in Boolean expressions , But more common 、 A more efficient way is to use a truth table . In practice, we usually let synthesis tools extract and simplify Boolean expressions , You don't have to write it yourself 、 Simplify to get an obscure and concise expression . This article first comes to learn Chisel Syntax related to combinational circuits in .

Basic combinational circuit representation

Use Chisel Describe some combinational circuit building blocks , You must know how to use Chisel Express combinational circuits . The most simple 、 The intuitive way is to use Boolean expressions , Boolean expressions can be assigned to a named variable ：

val e = (a & b) | c

Boolean expressions are assigned to a Scala Value to give a name e, This expression can then be reused through this name ：

val f = ~e

This expression is considered fixed , It can't be modified . If the e Reuse = Assignment will result in Scala Compiler error ：reassignment to val, If you use Chisel Operator in := If you assign a value , such as ：

e := c & b

There will be errors in the operation ：Cannot reassign to read-only.

Wire Type of combinational circuit and Chisel Conditional statements

Chisel It also supports the description of combinational circuits in the way of condition updating , Such circuits need to be declared as nets Wire, In the description, you can use Chisel Conditional operators in , such as when、otherwise etc. , To describe the logic of the circuit . For example, the following code describes a named w Wire network , It as a UInt Type and the default assignment is 0.U, and when The code block will accept a Chisel Of Bool The signal cond And in cond by true.B Reassign when 3.U to w：

val w = Wire(UInt())

w := 0.U
when (cond) {
    
    w := 3.U
}

I believe everyone can see it , This actually describes a multiplexer , It has two inputs , Namely 0.U and 3.U, Through conditions cond To select the signal . We still need to keep in mind that we are writing hardware circuits rather than software programs , Want to be with Scala Medium if What's the difference between conditional sentences , Hardware circuits are not conditionally executed .

Chisel Conditional structure of when Of course, it also has its own else, stay Chisel In is called .otherwise, By assigning values to all conditions, you can avoid assigning default values ：

val w = Wire(UInt())

when (cond) {
    
    w := 1.U
} .otherwise {
    
    w := 2.U
}

Since there is something similar if/else Structure , There must be something similar if/elseif/else The chain conditional sentence structure of ,Chisel Yes, it is ,Chisel China and elseif The corresponding is .elsewhen：

val w = Wire(UInt())

when (cond) {
    
    w := 1.U
} .elsewhen (cond) {
    
    w := 2.U
} .otherwise {
    
    w := 3.U
}

That's with this when/elsewhen/otherwise The hardware structure corresponding to the chain is the chain of multiplexers , The following figure is the hardware diagram corresponding to the above code ：

You can see that the chain of multiplexers has priority , If cond It's true , Other conditions will not be calculated .

It must be noted that .elsewhen and .otherwise Inside ., This is a Scala Syntax for linking methods in , and .elsewhen and elseif It's similar , There can be any one . However, if the conditional statement block only depends on a single signal , Then you'd better use switch sentence , This switch It will be introduced in the next article , The relevant syntax is introduced from the example of decoder circuit .

The assignment in the above conditional statement block is very simple , But in reality, it may be very complicated . Although it was said that if all conditions are covered, the initial value of assignment can be omitted , However, in practice, it is best to always give an initial value . We can follow RegInit equally , When declaring the network, use WireDefault Given the initial value ：

val w = WireDefault(0.U)

when (cond) {
    
    w := 3.U
}
// ...  Other more complex conditional assignment statement blocks 

You can notice that the default value given by the register is RegInit The suffix of is Init, Initialization means , and WireDefault The suffix of is Default, It means default or default , Why should we name it like this? You can ponder it for yourself .

Last but not least ,Chisel Medium when/elsewhen/otherwise and Scala Medium if/else if/else It's different .Scala The conditional statements in are used for Scala The conditions of the code are executed , and Chisel The conditional statements in are used to generate Chisel Multiplexer circuit . Yes, of course Scala Conditional statement in Chisel Also useful , For example, when writing a circuit generator , You can accept a parameter to generate different hardware instances according to the parameters .

Conclusion

This article briefly explains Chisel Two representations of combinational circuits in , One is non reassignable val, The other is declared as Wire()、 Types that can be conditionally updated . At the same time, it also introduces the corresponding multiplexer Chisel Conditional statement block , It is a very common hardware structure in practice . In the next article, we will use encoder / Take decoder, the two most classic combinational circuits, for example , In practice Chisel Implementation of combinational circuit in , At the same time, it will be right switch The grammar of gives an introduction .